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When VM=1, the protected-mode bit goes low and the Entry PLA selects real-mode entry points -- MOV ES, reg takes the one-line path. Meanwhile, CPL is hardwired to 3 whenever VM=1, so the V86 task always runs at the lowest privilege level, under full paging protection. The OS can use paging to virtualize the 8086's 1 MB address space, even simulating A20 address line wraparound by mapping pages to the same physical frames.
2026-03-05 00:00:00:03014345010http://paper.people.com.cn/rmrb/pc/content/202603/05/content_30143450.htmlhttp://paper.people.com.cn/rmrb/pad/content/202603/05/content_30143450.html11921 感知中国式现代化的万千气象（和音）